Low capacitance silicon CMOS photodetectors for optical interconnects

The feasibility of silicon as a platform for optoelectronics has generated intense research efforts and publicity in the last few years. One of the areas in which these advances in silicon photonics have the potential to make an impact is the interconnect part of electrical systems. As data rates scale to higher speeds, electrical interconnects require increased power dissipation and signal processing complexity. For example, interconnects take up to 50% of microprocessor power, and this portion is expected to rise to 80% in the future. Given that power dissipation is a critical parameter in today's electronic systems, the use of optics to carry data to and from VLSI chips is an attractive option if it can be done at a low enough power. To meet future interconnect scaling requirements, optical output devices need to have energies of ∼10 fJ/bit for I/O. This places a huge constraint on the capacitance of photodetectors, which form the receiving front end of optical interconnect links. We estimate that photodetector capacitances of the order of 1 fF are required. These numbers are achievable for small area photodetectors fabricated entirely in a silicon CMOS process that are directly integrated with the receiving circuitry at the transistor level.;This dissertation will present our work on the design, fabrication, characterization, and system level demonstrations of various silicon photodetector devices. First we will describe the characterization of CMOS compatible detectors fabricated in a commercial Silicon on Sapphire (SOS) CMOS process. Detector response times of ∼35 ps have been measured, and devices have capacitance as low as ∼4 fF. Next, these photodetectors are integrated with additional circuitry to implement optically triggered sampler circuits on chip. These circuits enable us to form a high speed oscilloscope that can measure high bandwidth analog signals on-chip. We demonstrate the complete capture of a 20 GHz on-chip signal, and precise measurement of skew between two separate chip locations. Finally, we present the design of nano-scale photodetectors fabricated on a Silicon-on-Oxide platform. These detectors have physical dimensions of the order of 150 nm, and are integrated with optical dipole antennas to resonantly enhance responsivity. We measure response times of ∼2 ps from nano-scale MSM photodetectors fabricated on this platform. Such sub-wavelength scale photodetectors offer the promise of optoelectronic integration at the scale of transistor dimensions, and coupled with resonantly enhanced detection techniques, would result in significant power, speed, and area gains.