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Planar Gallium arsenide nanowire arrays for nanoelectronics: Controlled growth, doping, characterization, and devices

Posted on:2014-12-29Degree:Ph.DType:Dissertation
University:University of Illinois at Urbana-ChampaignCandidate:Dowdy, Ryan StewartFull Text:PDF
GTID:1451390008954406Subject:Engineering
Abstract/Summary:
The Vapor-Liquid-Solid (VLS) mechanism is a bottom-up approach to produce onedimensional semiconductor structures, or nanowires. VLS nanowires are formed via a chemical or physical deposition process, where a metallic nanoparticle (seed) facilitates the growth. Nanowire growth diameter is strongly correlated to seed size, therefore top-down patterning can control site location and diameter of nanowire growth. Nanowires are sought after for their potential use as a manageable way produce small dimensioned semiconductor features without the need of expensive lithographic techniques. VLS nanowires commonly grow out-of-plane with respect to their growth substrate, resulting in difficulty with integrating VLS nanowires into existing device processing which is intended for planar geometries. Nanowires are typically removed from the substrate, which requires painstaking and uneconomical methods to pattern and align the nanowires. Planar nanowires are a potential solution to this issue; they grow in-plane on the substrate surface, epitaxially attached along its entire axis. Planar nanowires, as is, can be integrated into any preexisting planar semiconductor process, combining the advantages of nanowires with increased manufacturability. In this dissertation, planar GaAs nanowires are grown using metal organic chemical vapor deposition (MOCVD) with Au nanoparticles as the liquid metal seed. Growth occurs across multiple substrates to elucidate the mechanism behind planar nanowire growth direction. Knowledge gained by observing planar nanowire growth is used to precisely control nanowire growth direction. Subsequently the doping of planar nanowires is explored and unique phenomena related to the p-type doping of planar nanowires are investigated and discussed. The advantages of using planar nanowires are demonstrated through the controlled growth and doping of planar nanowires, and ultimately fabrication of electronic devices using conventional planar process techniques without the need for vertical nanowire processes or nanowire transferring. Devices are characterized and results are presented with discussion. The next steps for the future of planar nanowires are presented with initial results highlighting future applications and issues that must be solved. Chapter 1 is an introduction to the history of Vapor-Liquid-Solid nanowires, and as well as a brief overview of the accomplishments of the field and highlighting unsolved issues. Chapter 2 introduces the planar nanowire and discusses the motivation behind researching planar nanowires as a potential solution to the fundamental problems with vertical VLS nanowires. Chapter 3 gives a short background into VLS nanowire growth and properties, introduction to MOCVD growth and reactor design, and material properties of GaAs, the semiconductor material of interest in this dissertation. Chapter 4 presents the experimental details of planar GaAs nanowire growth on various substrates and the concept of projection theory to determined planar nanowire growth direction, as well as intrinsic growth phenomena. Chapter 5 delves into the doping of planar nanowires, both n-type and p-type. The morphological changes and perturbations to planar nanowire that are caused by p-type dopants are discussed. Chapter 6 demonstrates electrical devices such as MESFETS, inverting amplifiers and p-n diodes fabricated using planar GaAs nanowires as the active structure. Devices performance and metrics are discussed in this chapter. Chapter 7 outlines several future directions for planar nanowires and presents initial results in a variety of areas such as potential devices, modeling opportunities and fundamental issues that need to be solved.
Keywords/Search Tags:Nanowire, Planar, Growth, Devices, Doping, Chapter, Semiconductor, Potential
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