Embedded test circuit and method for Radio Frequency (RF) Systems-on-a-Chip (SoCs)

This proposal mainly focuses on research in embedded test circuit and methods for RF SoCs. First, lumped passive circuits for embedded test of RF SoCs are discussed. Many companies have been trying to integrate an entire WLAN system on a SoC. Such a high level integration calls for research in embedded tests for the SoC. The 802-11a WLAN embedded IC test requires 5 GHz directional couplers, baluns, and dividers, which are presented in this proposal. Lumped passive 5 GHz ICs were developed to realize these compact test devices.;Second, an embedded loop back for RF ICs test is described. The loopback test is one of the lowest cost methods for verifying functionality in a communication circuit. Thus, the loopback test is employed in mature product lines where cost is an over-riding concern or as a final test after other circuit tests. On-chip or on-wafer loopback circuits are designed for verifying performance of 5 GHz wireless WLAN IC circuits.;Finally, an embedded s-parameter measurement method is discussed. Testing and verification of the RF and microwave components are major parts of the total testing cost. This is so because very expensive RF and microwave test equipment (for example, A vector network analyzer) should be used for this test. Over the years, various methods have been considered to reduce testing costs. A new method is an on-wafer s-parameter measurement which is a very economical method for keeping high level accuracy.