A study on the reliability of flip chip solder joints

Flip chip technology, as one of the most promising choices for high-density microelectronic connections, is the object of enormous amount of studies. Along with the appearance of new applications of this technology, such as chip-on-organic board technology and Pb-free solders, new reliability issues need to be addressed.; One of the most important issues is the on-chip metallizations. Low melting temperature solders such as eutectic Sn-Pb solder are needed for the low processing temperature when organic substrates are involved. The traditional Cu-containing metallizations, however, usually have a high dissolution rate in high-Sn solders and a high intermetallic compound formation rate with the reactive component Sn in the solders. These processes result in a high consumption rate of the metallization mainly during the soldering process but also in service. Consumption of all wetting metallization results in failure during either fabrication or service. The design of new metallizations for these situations will be discussed.; Fatigue of solder joints caused by thermally induced stresses is another important reliability issue. A finite element tool is utilized to study the thermal fatigue of the solder joints in a chip scale ball-grid-array (BGA) package. Viscoplasticity of the solder material is described in the finite element model with a constitutive law that is capable of capturing the rate-dependent plasticity of such materials. Fatigue lifetime of solder joints is predicted based on a plastic work approach.; Iso-thermal fatigue of solder joints of different sizes is studied experimentally based on a damage integral approach. A lifetime prediction model previously constructed is modified to take account of the reduction of the solder joint size. The effect of the size of the solder joints on the fatigue crack propagation rates is discussed.; Thermally induced stresses are not only an important reliability concern for solder joints, but also for on-chip interconnect lines. A finite element study is performed for confined Cu interconnect lines. Stiffness matrix of Cu is integrated in the finite element model to simulate the grain structure, and the thermal stress on the grain boundary between mis-oriented grains is studied and compared with experimental findings.