| SIMD linear array is one of the simplest of parallel structures offering high peak performance in a compact and inexpensive form. We show that, in contrast to general belief, this structure is capable of high performance global image operations and also of effective real-time image operations. We show algorithms and performance estimates based on a prototype system, the Scan Line Array Processor (SLAP), and a high level language compiler. A novel high speed Hough Transform algorithm is included.;A high level language for the SLAP has been designed and implemented. The language incorporates features useful for the concise expression and efficient compilation of image-processing operations. The compiler exploits a novel unary operator, the directional in the manipulation of expression graphs. Directional-based manipulation, an extension of traditional algebraic compiler optimizations, is shown to be a powerful tool int he optimization of programs. The communication and computation schedule realized by the compiler is close to that of good hand-generated code. Our experiments indicate that directionals capture information about a program that is unused by current compilers.;The SLAP Processing Element (PE) design includes novel features to ameliorate the effects of SIMD local inflexibility. To a large extent these features can be included in the PE because the word size is significantly larger than the single bit found in the majority of SIMD architectures. The PE features include: hardware support for conditional operations, a shift/rotate unit that uses an amount local to a PE value for amount and direction, and local addressing. Because the SLAP PE has been implemented in VLSI (with 4 PEs per chip) practical issues strongly influenced the design. The prototype SLAP system we describe is comprised of 512 PEs and delivers up to 5.12... |
