Reconfigurable Digital Microwave/Millimeter-Wave Transmitter Integrated Circuit And Microsystem

In recent years,with the increasing development of the 5G wireless communication,smart city,the silicon-based wireless transmitter with high integration,low cost,and high efficiency is the key component of modern wireless transmission and communication systems.However,with the ever-increasing demands for higher output power,higher efficiency,higher data rates,there are still some challenges for silicon-based wireless transmitter systems design.In this dissertation,various architectures of digital power amplifier and transmitter with operation theories are proposed.In addition,a series of RF/microwave/millimeter-wave digital power amplifier and transmitter with state of the arts performances are implemented using CMOS process.The main contributions and innovations of this dissertation are summarized and concluded in the following aspects:1.High resolution watt-level reconfigurable digital power amplifier(DPA).In purpose of addressing the design challenges of wideband operation,high output power,and high efficiency,a digital polar power amplifier based on 12-bit power digital-toanalog is proposed.Through the reconfigurable voltage power combining transformer,higher output power can be obtained.Meanwhile,the reconfigurable output matching network can optimize the load impedance at different frequencies,which further improves the output power and efficiency and extends the operation bandwidth.Based on the ClassE power amplifier,high efficiency can be achieved.The proposed watt-level DPA is implemented in 40-nm CMOS technology.It features 32.67 d Bm peak output power with45.1% drain efficiency(DE)and 35.5% power added efficiency(PAE)at 2 GHz.It also could support 1024-QAM and 4096-QAM modulation signals.2.Reconfigurable quadrature DPA with power back-off(PBO)efficiency enhancement.Aiming to the design challenge of high PBO efficiency for power amplifier and transmitter,the architecture of switched/floated capacitor digital transmitter is proposed.The unused capacitor are floated to show a high impedance,which could avoid the extra power consumption when charging and discharging.Therefore,higher efficiency can be obtained.Then,based on the hybrid Doherty and impedance boosting,multiple efficiency peaks in the complex domain are introduced to enhance the PBO efficiency.Based on the proposed theories,the quadrature digital transmitters with deep PBO efficiency enhancement is proposed and implemented using 40-nm process.It features a peak saturated output power of 30.3 d Bm with a DE of 41.3% and a system efficiency(SE)of 36.5% at 2.4 GHz.The 3-d B operational bandwidth is about 2.15–3.35 GHz.It achieves the DE of 41.3/37.5/36.1/30.9/26.2/20.2% at 0/3/6/9/12/15 d B PBOs.It can support 60 MHz 256-QAM and 40 MHz 1024QAM signals.3.Reconfigurable self-coupling canceling transformer.The extra inductor with tunable capacitor is introduced in the transformer,which is coupled to the secondary inductor.Through tuning the capacitor,the equivalent inductance of secondary inductor can be adjusted.Then,the turn ratio of the transformer can be tuned.The unexpected weak coupling the extra inductor and primary inductor can be suppressed by the selfcoupling canceling transformer.Therefore,the reconfigurable self-coupling canceling transformer with enhanced tuning range of turn ratio and relatively low passive loss is used to achieve larger tuning range of turn ratio,which can finely meet the various requirements for impedance matching.4.Millimeter-wave quadrature switched capacitor digital transmitter.To address the problem of large LO leakage caused by parasitic capacitor,the technique of LO leakage self-suppression is proposed.The compensation signal is introduced in this work,which shows the same amplitude and opposite sign with LO leakage.Then,the compensation signal can finely decrease the LO leakage,which improve the dynamic range of transmitter.Besides,the efficiency of modulator can be improved by using the 3-D shielded horizontal capacitors with high quality factor.Based on the proposed architecture,the 22–30 GHz quadrature digital transmitter with LO leakage self-suppression is fabricated in a 40 nm CMOS technology.It features peak output power of 24.03 d Bm with31.5% SE at 24 GHz.It can support the 400 MHz 64-QAM modulation signal.5.Quadrature-rotation digital phased-array transmitter.Aiming to the high resolution phase control of sub-6G phased array transmitter,a quadrature-rotation phased-array transmitter is proposed.Phase shifting in each element is achieved by hybrid coarse and fine phase-tuning techniques.The proposed 2×2 phased-array transmitter is implemented in 40-nm CMOS process,which features 28.4d Bm peak output power and 37.9% peak SE.The measured RMS phase and power errors after DPD technique are 0.12° and0.15 d B,respectively.