Research Of High Dynamic GPS Signal Acquisition And FPGA Design

With the rapid development of the technology of satellite navigation, every country is paying more and more attention to the satellite navigation system with the using of the high dynamic technology, which is not only a huge impetus to the economic development but also a key point of a country's safety. So our country has developed the Compass series navigation system independently in this backdrop. But one of the difficulties is still the development of the receiver under high dynamic development because of the low degree of autonomy of our country's high dynamic receiver until now. It is obviously negative to have too much reliance on foreign product in such areas of national security. So, the research on the core technology of GPS can not only change the condition of the low level of autonomy but also be positive for the development of the Compass navigation system of our country.Firstly, this thesis introduces the structure,positioning theory and signal structure of the GPS system and the signal modulation of GPS. Then it describes the generation of the C/A code in detail and analyzes the related characteristics of C/A code, meanwhile, it has a matlab simulation and a research on the spectrum and related characteristics of the C/A code.Secondly, this thesis has a deep study on the time-domain sliding correlation capturing algorithm and its evolution algorithm, that is, FFT rapid capturing algorithm which is chosen to the application to the high dynamic environment by doing research on and making comparison of the computation and the average acquisition of these two algorithms. In order to save FPGA resources, this thesis makes an improvement to the algorithm and does a matlab simulation of the improved C/A code, from which it have an improved result of the lower of the noise ratio with no change of the capturing performance.Then,it does a simulation and analysis for the FFT rapid capturing algorithm and the result demonstrates the feasibility of this algorithm. After this, it gives the parameters that need to be used, such as the capture threshold, capture frequency steps and so on.Finally, this thesis works out the implementation principles,implementation block of every module in the FFT rapid capturing circuit in detail from the view of project implementation and passes the test of simulation in the QuartusII environment with the using of the Verilog HDL hardware language. The simulation results meets the circuit functions and performance requirements.