A Novel Fast Topology Analysis Algorithm Based On PMU Information

The time-consuming of power system network topology analysis directly affects the response speed of entire advanced application software. Therefore, the increasingly complexity of modern power systems is in demand of a more rapid and accurate topology analysis algorithm. With the widely installation of Phasor Measurement Units (PMUs), the measurement update period has been reduced to tens of milliseconds, which makes the time lag of topology analysis more shorter. Hence, it is possible to use PMU information to accelerate topology analysis. In this paper, a novel topology analysis algorithm using PMU information is proposed to overcome the problems in traditional one. Finally, the following results are concluded:(1) A novel substation topology analysis algorithm based on synchronized phasor data is proposed. The novel one adopts an integrated utilization of the state information of circuit breakers (CBs) and the synchro-phasor information of voltage and current, which mainly bases on Kirchhoff current law (KCL) and whether the two bus voltage phasor is equal. The new algorithm can be used to finish all kinds of substation configuration analysis accurately and reliably.(2) Based on KCL, a new network topology analysis algorithm is presented. According to the distributed characteristic of the injected currents of one electrical island, in which the sum of all current should be equal to zero, this algorithm could be used to track the change of circuit breakers statues and analysis the variation of island number. In this process, the search of several switches and the calculation of related equations will be the key steps In addition, the combination scheme with on-line tracking and off-line calculation will accelerate the response speed of topology analysis.(3) A method is pointed to improve the reliability of the power system topology based on synchronized information, which is able to identify errors of PMU data effectively. The identification procedure is divided into two parts, one is to identify various types of topology errors and current phasor measurement error rapidly and accurately; and the other part will mainly focus on identification of the bus voltage phasor relying on the electric characteristic. The proposed method could improve the reliability of the topology analysis.