The Design And Implement Of Data Acquisition Circuit Of The Laser Gyro Sins Inertial Navigation System Components

Laser gyro SINS inertial navigation system components as an ideal instrument, has been widely used at home and abroad, is the research focus of today's inertial navigation system. As the laser gyro adopt the mechanical dithered technology to reduce lock error, so that the output is bound to the laser gyro dither signal and random noise, it is necessary to filter and remove high-frequency jitter signal and random noise. However,in order to filter the the output signal of the laser gyro, the most effective way is through the data acquisition circuit of the sins components to implement filter.The quartz accelerometers output signal of the Inertial components that is displacement signal of the navigation solution related to the calculation of the precision accuracy of attitude, so need to be collected with high accuracy A/D conversion. Improve the accuracy of the data acquisition circuit is the key directions of studying the sins.This paper introduces the working principle of the laser gyro and the blocking effect caused the error, and described method of eliminating lock error by mechanical dithered technology.FIR filter has a strictly linear phase and stability of the system to meet the output signal of the laser gyro requirement of the implementation of filtering, so the system uses the FIR filters filter high frequency jitter and random partial-band noise signal. In order to reduce the volume of data acquisition circuit, improving data collection and transmission of the synchronization, using the FPGA to implement data acquisition and FIR digital filter function. using 18-bit A/D converter to convert the output analog signals of Quartz accelerometers.In this paper, the hardware and software design are explained in detail, focusing on the A/D driver circuit, FIR filter module and the A/D acquisition and control module design. To further validate the accuracy of data acquisition circuit, through experiments to further verify the correctness of the data acquisition circuit.