Study On Boost PFC Toplogy And Control Strategy

Active Power Factor Correction technology research focused on the circuit topology, control strategy, modeling analysis and so on. In addition to the basic converter structure, circuit topology research take advantage of these features to form the topological structure itself needed PFC transformation to achieve increased circuit performance, lower cost. Control strategy of the research is mainly for a particular topology, the mathematical and modeling through analysis of different, to find the optimal or the most appropriate control method to improve the overall circuit's performance, simplify the control circuit, In addition, by improving the performance of switching devices can also improve the overall performance of the circuit.This paper analyzes the power factor correction technology in the principles of critical conduction mode, and is given for TMS320LF2812 PFC power factor correction circuit of the whole process of design, analysis and debugging. Specifically, do the following:(1) Interleaving in the analysis, no bridge totem and spiritual ripple topology of three working principles and performance characteristics based on the current sampling is proposed a simple, low on-state losses, the improved EMI noise-free zero-ripple cross bridges in parallel Boost PFC circuit. Given Boost APFC topology have low-power, low EMI, high efficiency and many other advantages. And improved Boost APFC circuit relies on the PSPICE platform to build simulation models, by simulation.(2) Based on state-space averaging method, according to Boost the number of average current control principle of the law built the small-signal model of Boost PFC, solving for the steady-state solution Boost PFC equations and Dynamic Solutions of the Perturbed equations. In the BOOST converter power stage after the establishment of modeling equations, this use of classical control theory in the PI correction, and rely on mathematical tool Matlab m-functions are drawn, voltage and current loop open-loop correction and adding a current loop and the former voltage loop controller closed loop the entire process, and then design the current loop and voltage loop controller.(3) To TMS320LF2812 signal processing chips, digital control for the PFC core areas of traditional control move TMS320LF2812 chip, and based on simulink platform construction power level and control level co-simulation platform for simulation. Finally, using digital PFC control algorithm is also the advantage of flexibility in the traditional control of the impact of current inhibited by adding start and reduce crossover distortion, weak integral PI regulator, a series of optimization module current sharing, and strive to improve the Boost PFC static and dynamic performance .(4) Last rely on TMS320LF2812 signal processing chip, designed by the second chapter of the new topology used in APFC 1000W digital hardware circuits. The hardware circuit design, according to the minimum switching frequency set at 25-50k to avoid noise between the principles of work design two-way primary inductor, and output ripple under the power-down time limits are designed to double the output capacitor. Kernel in the digital control design, a reasonable allocation of resources to the third chapter of traditional APFC control Fangfa move in the digital control chip for the fourth chapter Rongru system optimization algorithm given finally test result.