Key Circuit Design Of The Computer-Controlled Patch-Clamp Amplifier

In the Computer-Controlled Patch-Clamp Amplifier, lots of parameters are compensated and each section of the system is estimated automatically, that make it easier to perform experiments than that of traditional patch clamp amplifier. At the same time, the new patch clamp amplifier improves precision of the system and decreases system noise. Some key circuit, which includes logic control, programmable filter, stimulus channel offset voltage compensation and so on, must be designed anew or modified for Patch-Clamp Amplifier being controlled by computer. In logic control, FPGA technology is applied to set the parameters of head stage and mainboard of patch-clamp. In programmable filter the method of designing the programmable filter is described here, and the Least Square Fit algorithm is applied to calibrate a series of parameter automatically. In stimulus channel, the principle, circuit and calibration method are analyzed. In offset voltage compensation, the reason, the method of eliminating it, the circuit and calibration principle is described. In the end, the signification and test flow of full test of the Computer-Controlled Patch-Clamp amplifier are expatiated, according to the characteristic of being tested sections, the principle and means of full test are analyzed in detail. By adopting new design of key circuit The Patch-Clamp Amplifier realizes to be controlled by the computer.