The Research And Design Of Low Power Low Offset Digital Thermometer

This thesis summarized the developing history, present situation and trends of thermometer and integrated temperature sensor. In this thesis, principles and advantages of the CMOS integrated temperature sensor were described,and the research meaning was also pointed out. The temperature characteristics of MOSFET, the configuration of MOSFET capacitor and MOSFET analog switch, based on CMOS process, were researched. The article analyzed and compared the type, the merits and demerits of voltage reference, pointed out the advantages of bandgap reference(BGR), and the improved configuration of BGR was chosen. The constitution and the generation of CMOS circuit power were researched, the main method of reducing power was illustrated, and we designed the whole circuit of thermometer according to the rule of low power and high reliability. Combining the popular chopper modulate technology, the design of low offset reference circuit was put forward after in-depth analysis of the offset mechanics. According to the research of the performances of various temperature sensors, this paper designed a new duty cycle modulated digital thermometer configuration of low power consumption, which includes temperature sensing circuit, first-orderΣ-Δmodulate circuit and digital duty cycle measuring circuit. The temperature sensing circuit adopts current-output mode taking PNP substrate transistor as temperature sensing device. According to the theory of the BGR, PTAT and CTAT can be generated from the circuit, and the former one is regarded as the initial signal which correlating to the temperature. On the one hand, the design uses low voltage cascode OP framework to improve its gain; on the other hand, it applies self-bias and cascode structure to the whole sensing circuit. By using the improved method, we have successfully obtained low power consumption, low offset, high linear and high PSRR PTAT current generator under low power supply. Based on the current signal from the proceeding stage, the first orderΣ-Δmodulator designed could be simplified in the precondition of performance satisfaction, and it is good in accomplishing signal conversion and could be incorporated with the forestage bandgap circuit. The bias voltage in the circuit is supplied by the BGR, which reduces the power consumption and the area of the chip. This paper takes polygon interpolation as non-linear calibration method, adopts HDL Verilog to design the digital duty cycle measuring circuit, from which we have obtained a group of...