Research On Space-borne SAR Maging Algorithm And Its Real-time Implementation On DSPs

The space-borne Synthetic Aperture Radar (SAR) is the application in space of SAR, which poses greater difficulty for imaging especially real-time imaging, compared to air-borne SAR. We have to develop proper imaging algorithm that can satisfy both the requirements of high-precision imaging and the ability of current computing technology.This thesis focused on Refined Chirp Scaling Algorithm and its implementation on DSP for real-time processing. In this thesis, we make researches on the imaging geographical model of space-borne SAR, and we analyze the performance of different imaging algorithms. And based on equivalent range model and classic Chirp Scaling imaging algorithm, we develop refined Chirp Scaling imaging algorithm for space-borne SAR. Also the implementation of this algorithm is researched, based on current multi-DSP high-speed processing board.In Chapter 2, we introduce the parameter design and the imaging geographical model of space-borne SAR. The constraints between azimuth resolution, pulse repetition, the down-look angle and swath are given. The impact of earth rotation on SAR imaging is discussed. Also simulations on range migration cells are implemented.In Chapter 3, we analyze the performance of different imaging algorithm such as range-Doppler, classic Chirp Scaling, etc. And based on equivalent range model and classic Chirp Scaling imaging algorithm, we develop refined Chirp Scaling imaging algorithm for space-borne SAR, and a detailed computer simulation on one point target and multi-points targets are implemented, also the performance of this algorithm is analyzed.In Chapter 4, the parallel proceeding technology is introduced. The difficulties on real-time implementation of refined Chirp Scaling algorithm are discussed. And several parallel software programming modes on loose coupling architecture multi-DSP platform based on ADSP-TS101S is studied. Also, software optimizing measures in assembly language for this chip are studied. Finally, a complete implementation of refined Chirp Scaling algorithm is given.