| DC-DC converter is widely adopted with the growing usage of portable applications. Since these applications are usually powered by energy-limited single-cell battery, how to improve the efficiency and power consumption to prolong the battery life is the primary consideration in DC-DC converter designs.A design method of a high-efficiency, low-power, switching-power DC-DC converter with pulse-width modulation (PWM) and pulse-frequency modulation (PFM) modes is presented. The converter operates in voltage control based PWM mode at a switching frequency of 1 MHz when the load current is large(> 60 mA) and inductor current continuous, and works in peak-current and hysteretic control based PFM mode with a reduced switching frequency of less than 0.5 MHz if the load current is small(< 60 mA) and inductor current discontinuous, ensuring highly efficient operation within a large range (0～250 mA) of load current variation. As the output voltage reaches 102% of the anticipated output value, the converter enters sleep mode, during which the quiescent current decreases. The chip was implemented using CSMC 0.5μm CMOS mixed-signal process. Simulation and testing results indicate that the converter operates in PWM/PFM modes and performs seamless switching between them, displaying good load/line regulation. The output voltage error is less than±2%, the maximum quiescent current less than 15μA and the maximum of efficiency up to 92.6%.Chapter 1 discusses switching-power DC-DC principles and control strategies. Chapter 2 describes the system structure, operating modes and performance of the proposed converter. Chapter 3 introduces the design method of some main circuit blocks. Chapter 4 presents systematic simulation and testing results. Then Chapter 5 discusses improvements that could be made to the proposed converter for practical application.
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