High Voltage BUCK Converter With PWM/PSM Dual-Mode

Nowadays, portable electronic products and consumer electronics products are fast developed and widely applied in our daily lives. As the essential part of these product, power management chip are rapidly developed and have increasingly demands on its performance. In general, the requirement of power management chip can be conclude to 3 aspects: higher efficiency, higher input voltage and larger load current. DC-DC switching regulator becomes popular for its high efficiency in recent years and has been rapidly developed.A novel step-down DC-DC switching regulator consists of pulse width modulation (PWM) and pulse skipping modulation(PSM) is proposed in this paper. Its input voltage ranges from 3V to 24V, and output voltage ranges from 2.5V to (VI -0.5) V, the maximum load current of 1 A. It works in PWM-mode at a switching frequency of 1 MHz When the load current is large and operates in PSM-mode with a reduced switching frequency if the load current is low, which makes a high efficiency in the wide load current range. It skips from PWM to PSM not according to a fixed load current unless the input and output voltage is fixed. Its difference from former PWM/PSM dual-mode converter is that is switches from PWM to PSM by limiting the minimum duty cycle instead of detecting the load current and the mode control circuit be easily realized by some logic gate.The regulator adopts asynchronous rectifier technology to avoid any negative inductor current, and minimize the conduction loss related with loop current. NMOS is used as pull-up power MOS, so we design a Boot-strap circuit to provide a higher voltage than input voltage to the gate of NMOS. Because the input voltage can reach up to 24V, so we integrate a LDO into the chip to provide voltage to the low voltage modules. We also design a digital soft-start circuit to avoid the surge phenomenon, and a current sense circuit to limit the peak current of the circuit.This circuit is implemented in the CSMC 0.5um 40V mixed-signal process. The experimental results indicate that the chip can make the efficiency up to 75% at light load and 91% at heavy load and can alter mode smoothly and display good load regulation. The Output voltage error is less than 20mV。...