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Design Of The Cipher Chip Based On Nonlinear Combining Feedforward Sequence Generator

Posted on:2001-08-15Degree:MasterType:Thesis
Country:ChinaCandidate:H H ChenFull Text:PDF
GTID:2168360002450785Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the fast development of information highway in our nation, informationtechnology and informanon industry have been psid more and more attention How toprotect information from illegally acqmrmg or altering has been brough into focus ofpeople's care As a result theory and technology of the cryptlogy have become acritlcal research field of the mformation science and engineeringNowadays, the chips of IC implementaions of various cryptology algorithms havecome into the markat, but most of them are based on block ciphers The block cipherhas the weakness of high cost and slow encrypting&decrypting speed, so that thechips based on block cipher are not smtable for mass use and high speed applicationStreaxn ciphers are fast and easy to implement in IC, so study and design cipher chipsbased on stream cipher have not only very high theoretical value but also greatpractical significanceAn encrypion algorithm, on the basis of deep studying on modern cryptologytheories especlally the theory of stream cipher, is presented and an integrated circultdesign based on it is described in this dissertation This thesis is composed of threeparts The rundamental theory of the modem cryptology is briefly introduced in thefirst part In this part, the mathematic model, the security measure and theclassification of cipher system are discussed, and the theory of shift register is studiedtoo, The second part focuses on the algonthm design of the nonlinear combingfeedforward seqence generator As a msin part, the design theory and the concretesolution of it are presented step by step, and some test and statistic analysis criteria aretaken to verify the design, IC chip design method for implementation of the algorithmis described in detall in the third part The design ls simulated and venfied withCadence Venlog-XL and implemented by FPGA devices Some design results and anapplication exarnple of the cipher chip designed are also presented in this part...
Keywords/Search Tags:Feedforward
PDF Full Text Request
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