Research On Image Compression Based On DSP

Due to the increasing interests in digital TV,wired/wireless video telephony,multimedia applications and storage of video on compact disks,there has been tremendous progress in video compression and coding for the last decade. The most successful techniques so far are the hybrid coding schemes,i.e.,those based on motion estimation(ME) and discrete cosine transformation(DCT).The hybrid coding gives rise to all international standards for moving images,i.e.,ITU-T H.261/3,MPEG-l/2 and MPEG-4. The intensive computation involved in these techniques poses challenges to real-time implementation.Dedicated VLSI-based implementation can be made for such computationally intensive schemes,as either complete codecs or core modules. These approaches are efficient since the design can be highly optimized for particular algorithms. Disadvantages of the approach are the large number of dedicated modules and their limited adaptability for an algorithm to be modified. Adaptation to a new coding scheme can result in a redesign.More flexible implementation is achieved by utilizing programmable DSP. Such an approach not only shorten the time to market but also offers adaptability by reprogramming. With the development of VLSI technique,the performance difference between DSP implementation and VLSI will become very small.This paper is composed of the following parts:Firstly,major video coding techniques and standards and the evolution of DSP architecture is analyzed.Secondly,the methodology of video coding implementation on DSP is given. To meet the real-time requirements and lower the cost some major principles must be adopted during the process of choosing algorithm,writing code and utilizing parallelism.Lastly,as an example of DSP implementation of video coding,the development flow of MPEG-4 video Simple Profile coding on TMS320C6201 DSP is presented. Major techniques are also given.