CCD Data Acquisition System And Study On Its CDS Reduction Noise

With the development of the Charge Coupled Device(CCD) and the coming of digitizing epoch, the higher requirement of CCD signal's performance and digitizing was brought forward. A CCD data acquisition system with digital noise reduction technique was studied in the paper.Firstly, started with the theory and noise source of CCD, the CCD noise was analyzed. Secondly, the Correlated Double Sampling(CDS) and the correlation of resetting noise was closely analyzed and calculated, then gave out the correlation condition. Finally, a double sampling method based on digital technique was presented in allusion to the limitation of existing method. Further more, this method is put to use in the data acquisition system.Toshiba's CCD chip i.e. TCD142D was gathered in the system and its parameter and performance was specified. The system includes four blocks: CCD driving, data acquisition, data buffering and date processing. The paper recounted the task of each model and illuminated their operating theory and performance parameter. The system adopted the Complex Programmable Logic Device(CPLD) technique and integrated the digital circuit sector in a CPLD chip. This makes chances for the system's miniaturization, stability, immunity, in-line modification and upgrade. The CCD signal passed through A/D converting and buffering, then delivered to the Single-Chip Microcomputer (SCM) to examine, analyze and process in the system. WAVE emulator was used to debug the software and hardware of SCM.The study of the subject ultimately realized the high-speed data acquisition of CCD and explored a new method based on double sampling theory and digital technique to restraint the CCD resetting noise. Finally, debug data and experimental waveform was given in this paper and verified the system's stability and the restraint for CCD noise.