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The Research Of The Digital Video Image Sample And Processing Technology Based On DSP

Posted on:2005-06-13Degree:MasterType:Thesis
Country:ChinaCandidate:X L ZhouFull Text:PDF
GTID:2168360152967593Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
In last 20 years, the development of semiconductor technology has strongly promptedthe application of digital image processing technology in the areas of industries, commerce,medicine, aerospace, science research and consumer electronics. The difficulties brought bydigital image processing are the huge data count and the very high-speed processingcapacity and very large-capacity memorizer demanded. Some of the current digital imageprocessing systems are based on embedded computer, some are based on FPGA, some arebased on application specific compressing chip, and some are based on DSP. Theimplementations based on DSP are more flexible, can fulfill the requirements of specialvideo formats and processing, and can be easily extended, upgraded and maintained. So isthe direction of reach and development. Based on the research in the current digital video image processing technology'sdevelopment, this paper introduces a digital video image sample and processing systemdesign based on TMS320C6711 DSP, and implemented JPEG compressing algorithm onthis system. By using the full functional video decoder and cooperated with the DSP program, thissystem can be compliant with various video formats. By analyzing the timing and logiccarefully, this system uses high-speed FIFO implementing the interconnection between thevideo decoder and DSP to achieve the high speed buffering of the video data. By using theEDMA function of TMS320C6711, this system can transport video data at very high speedwithout CPU interference, thus improving the performance and diminishing the systemburthen. This system implemented the I2C interconnection between the video decoder andTMS320C6711 through software simulation using TMS320C6711's McBSP functional unit,needn't the MCU coprocessor usually used in this type system. Through precise timinganalyzing and calculation, this system chose high-speed CPLD to implement the crossconnection between the chips, using VHDL language designing the CPLD logic, achieved IIthe harmonious operation of the different parts. Finally, this paper deeply discussed theJPEG compression algorithm, and made the implementation and optimization of the JPEGalgorithm on this system. So a whole digital video image sample and processing systemwas gotten. Compared to the current same-type system, this system is simpler in structure andcheaper in cost. Profitted from the powerful processing ability of TMS320C6711 DSP,through developing different software, this system can be applied to all kinds of embededimage processing systems. So is more practical and advanced.
Keywords/Search Tags:Digital Video, DSP, Video Decoder, JPEG
PDF Full Text Request
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