| Speech recognition (SR) is one of the most important areas in the Information & Technology field. Small-Vocabulary Speaker-Independent Isolated-Word Recognition (SVSIIWR) is a promising branch in Speech recognition technology as seen from its many contributions in applications such as home appliances telecontrol, intelligent toy, and human computer interaction techniques.Speech recognition chip appears from 1990's. In today's speech recognition chip a DSP based system is adopted. In such a system the speech recognition algorithm is mainly implemented by software. In order to increase speed and reduce cost the next generation SR chip will be software and hardware co-designed. The purpose of this paper is to implement SR algorithm with only hardware. The result can be used for reference by the software and hardware co-design scheme.Summarily, this paper completes the work as following:(1) Complete the whole system design on selected FPGA platform.(2) Because Multiplexer, Logarithm, Square-root and Fast Fourier Transform modules are difficult to be realized in hardware and occupy much resource, according to its specification, we give skillful realization issue and achieve the requirement of the system.(3) Module reused and pipeline technology is used in the system.(4) Find out how many resources needed by each module and obtain the processing capacity of each module.The results of experiment demonstrate that this system can work properly. The speed as well as the area reaches the design requirement. |