The Research And Implementation On The Kernel Execution Mechanism Of MASA Stream Processer

The main goal of our work is the design and implementation a microprocessor core based on MASA stream architecture. Our purpose is to develop a programmable processor for Intensive processing applications ,and a basic platform of CPU micro architecture research, which can provide architecture researchers a basic hardware and software environment, based on which, they can perform in-depth research of microprocessor architecture concepts and technologies.Based on the deep analysis of the high performance programmable architecture and some other microprocessors, we chose stream architecture as our reference, present an abstract stream architecture model, and then design a Imagine compatible instruction set.After the instruction set design, the work flow of a microprocessor includes functionality organization, logic designing (implementation) and realization technology. Following the steps, we introduce the details of the core design. The paper emphasis on some key problems in MASA's designing, such as implementing three new SRP access schedule algorithmic, improved conditional executing mechanism and a hardware-supported software pipeline. After primary design of MASA, to extend the application domains suited for typical stream architecture, this paper presents the definition of irregular stream and three main execution models for it. At last a benchmark for Intensive processing applications has been mapped and testing on our RTL simulator to study the effect of MASA.The microprocessor core, with 48 int-float ALUs, is programmed in Verilog at RTL level, and performed the functional verification and pipeline performance analysis on the ModelSim SE 5.7d and SYNOPSYS's VCS tools. Finally, the whole core was implemented on a Xilinx FPGA XC4VLX200.