| With the development of video conference, high-definition (HD) video conference systems have gained wide concern. As a new generation standard, H.264 standard is adopted to more and more applications. In these backgrounds, by use of the latest DaVinci processor TMS320DM6467, this paper realizes H.264 video decoder for HD video conference system.In chapter 1, brief introduction of video conference system and video compress technology is given, and H.264 standard are briefly introduced.In chapter 2, the characteristics of H.264 standard and key technologies of H.264 decoder are analyzed.In chapter 3, development platform is introduced, mainly includes two aspects:the first is TMS320DM6467 processor, including framework, storage systems, C64x+ DSP and HDVICP; the second are DaVinci softwares and tools, including xDM standards, Codec Engine framework, XDC and etc.In chapter 4, algorithm design for H.264 video decoder is given. Firstly design goal of decoder, which is based on Codec Engine with the algorithm compatible with xDM standards, is explained. The decoder algorithm, which is depend on remote calling, is composed of decode Task and HWI. To real-time decode H.264 video on IP network with packet losses, an effective error concealment algorithm is proposed. By use of the information of edge macro-blocks of the lost slice, the motion vector of corrupted macro-block is predicted, and then the error concealment is completed.In chapter 5, decoder optimizations are explained. Compiler options optimization, C language refine, storage space and cache optimization are firstly used. HDVICP accelerating units are pipelined to improve parallel degree of decoder. In order to speed up the EDMA, Ping-Pong mirror of EDMA parameters and auto increment mode are used. At the same time, synchronizing tasks of EDMA and HDVICP are assigned to ARM968, in order to fully utilize system performance. Finally, the goal of real-time decoding 1080P video streams on TMS320DM6467 is achieved. |
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