Research On Fuzzy Logic Chip For Engine Idle Speed Control

Since L.A.Zadeh, an American expert in automatic control, proposedfuzzy theory for the first time in 1965, it has been developing rapidly in theshort forty years and been applied widely in all kinds of fields, especially inthe realm of process control. Although without any accurate mathematicmodels processes can be controlled by series of control rules based on humanexperiences and knowledge of manipulating objects. Due to the properties ofnon-linearity, time variation and uncertainty in the work phase of engine idlespeed, it is difficult to construct an accurate and simple model, in which fuzzycontrol fits nicely. At present open-loop control schemes are often adopted inengine idle speed control, which is one-way control from inputs to outputs andcannot obtain satisfying results. In addition, this work phase has much to dowith fuel consumption and gas exhaustion and has played an important part inthe research of engine control.In the first place, this paper researches on the algorithm of fuzzy logiccontrol that is appropriate in engine idle speed control and VLSIimplementation. This algorithm has such features: only the active rules areprocessed;operation of defuzzification is simplified by omitting division;membership functions of antecedents are calculated and not stored;memoryfor knowledge base only stores the constants of consequents. To verify itsperformance and compare it with other control algorithms, simulation hasbeen done in MATLAB for closed-loop engine speed control. Based on thisalgorithm, furthermore, VLSI behavioral level architecture is designed andsimulated. In order to verify the effectiveness and performance of the fuzzylogic algorithm and circuits, this paper adopts Spartan II FPGA of XilinxCompany to implement this fuzzy logic controller and establishes the idlespeed control system for the experiment on vehicles. And favorable controlresults have been achieved. After functional verification through a series ofsimulation and experiments, ASIC design is completed under 0.18 μ m 1P6Mstandard CMOS technology and the chip is fabricated in SMIC. This paperdoes a beneficial attempt on applying fuzzy logic chips to practical controlissues.