| With the rapid development of micro-electronics devices, Ultra-Wideband technology has begun to be applied in civil areas. In the short distance communication, with the advantageous qualities of low power consumption, high speed rate, high-capacity and multi-address access etc., the Ultra-Wideband communication arouses the people's widespread interest. It is a technology with extensive application prosperity.In this topic, an ADC circuit and data-storage system for all digital Ultra-Wideband receiver was designed, and the Ultra-Wideband narrow pulse signal that is received is digitalized, using an ultra-high-speed A/D convertor. A plan with ADC and high speed FPGA was adopted in this system, and the signal which is received is storaged.The choice and design of chip are based on the analysis of concrete target of receiver system. The ADC chip chosen is AT84AD001 which is produced by Atmel Corporation, and the chip is setted on its 3-wire serial interface to work in interlaced mode, and this can achieve the sampling rate the system needs. The FPGA chip chosen is EP2S60F1020 of Altera Corporation, this topic studies and uses the internal dedicated transceiver and, analyzes and designs the interface between FPGA and ADC in detail. The contents in this topic include several aspects such as:(1) In the first chapter, the background of topic and the development of Ultra-Wideband technology are introduced.(2) In the second chapter, at the foundation of analysis of the application software wireless technology's advantage, a plan of all digital Ultra-Wideband receiver is brought forward. The technology guideline of ADC chip and FPGA chip used in the receiver is analyzed, and the data-collecting system of 2GHz composed by ADC and FPGA is designed.(3) In the third chapter, the ADC's working mode is analyzed and designed. The periphery electric circuit of ADC was designed, including 3-wire serial port configuration circuit, analog input electric circuit, clock input circuit and power... |
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