| Today the electronic system design is the large-scale FPGA physical carrier system-on-chip design. FPGA-based system-on-chip is known as System On a Programmable Chip(SOPC). SOPC design is based on intellectual property Core (IP Core), the hardware description language as the main design method, the EDA tools on a platform of the computer.This thesis presents the modem program by SOPC after introducing the FPGA and SOPC technology on the basis. After the analysis of design software Matlab / DSP (Digital Signal Processing) builder and development software Quartus II designing SOPC (Programmable System On a Chip) process, it presents a DSPBuilder based modem SOPC Solution by modulation and demodulation algorithm, and modular design greatly shorten the development cycle of modem.In the process of modem SOPC technology development, the system model is done by using graphics Block movement of Altera DSP Builder and other Simulink library in MATLAB/Simulink. After simulation in Simulink has been passed, we transform Simulink model files (. Mdl) into VHDL hardware description language by DSP Builder, thus avoiding the VHDL system program by the cumbersome manual process, and focus on the optimization of algorithm.Based on the DSP Builder development functions, low-pass filter of modems circuit can be called directly from FIR IP Core to further improve development efficiency.After the success of compilation and simulation, the Quartus II compiler will download program document to ALTERA Corporation Cyclone II Series FPGA chip EP2C5F256C6, complete device programming, which is a modem SOPC System realization. |