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The Design Of A Wide Band Digital Receiver Based On FPGA

Posted on:2009-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:S WangFull Text:PDF
GTID:2178360242984126Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Modern electronic receiving systems often work in a more complex electromagnetic environment, which demands the receiving systems have higher anti-jamming abilities and flexibility, the traditional analog receiving system, with poor anti-interference capability and flexibility, has become increasingly unable to meet such a request. Along with the development of digital technologies, digital systems can provide better performance and greater flexibility, so the development of strong anti-jamming capability and flexibility of the digital receiver has become an important research theme. This paper mainly studies the design of digital receivers and how to improve the receiver's performance including the expansion of the receiver's dynamic range and improve receiver's sensitivity, as well as how to improve the flexibility of receivers.In this paper the theory and implementation of low-pass RF direct sampling structure digital receiver are mainly discussed, on the basis of the three-channel wideband digital receiver's design of electric field detector. Firstly, the realization of a digital receiver's architecture, hardware platforms and the status at this stage are introduced. Secondly, to the issue of how to expand the dynamic range and improve the sensitivity of receivers, this paper focus on the gain, third-order intercept point of analog front-end and sampling rate, quantization noise of ADC, which have crucial impact on the receiver's noise figure and dynamic range, the best option is found after a theoretical analysis and simulation to the receiver system, that is the principle of matching between analog front-end and ADC. On the problem of how to improve receiver's flexibility, the data transfer structure of A/D+FPGA+MCU+USB2.0 is used in this paper with the data processing completed in the common computer, because FPGA and USB2.0 interface device are reconfigurable, the user can modify the design of the receiver without changing the hardware. For the last part of this paper, the digital receiver's data processing software and the test including the frequency, the sensitivity and dynamic range of the whole digital receiver are introduced, the results show that the receiver meet the requirements of the application.
Keywords/Search Tags:digital receiver, FPGA, USB2.0, dynamic range, noise figure
PDF Full Text Request
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