Studies On The Design And Implementation Of Two Dimension Hyper Chaotic Stream Ciphers

With the rapid development and wide application of communication technology and network technology, more and more information has been transmitted through the network. Therefore, the security of information is getting more and more important. The cryptography, which aims at the security of information, has become of the important research fields in information science and technology. At the same time, the combination of the chaotic theory and the cryptography is very close. Chaotic systems are sensitive to initial conditions and chaotic parameters, and can produce massive high security sequence with analogous randomness, correlation, broadband and continuous spectrum. Chaotic sequences are suitable for the sequence encryption.But as a new interdisciplinaryFirstly,the preliminaries including the theory of modern cryptograp and chaos dynamics are presented . Based on the typical one dimension chaos system Logistic Map,We discuss the main features for description chaos system and the basic characteristics of chaos in detail. Then, we analyze characteristics of three typical and common chaotic system,introduce the principle,method and characteristics of sequence cipher.Because the encryption algorithm based on one-dimensional chaotic have flaws of small space of key and lower security, Therefore, this paper focuses on the study of two dimension hyper chaos system coupled in by Logistic map sequence and its applications in the data encryption. With a view to making some useful research efforts and attempts in the data encryption algorithm, At the same time to do some exploring work in data encryption based on hyperchaos.Then , A new software, named DSP Builder, which is detruded by Altera, is chosen as the designing tool. The general method of how to use the altera DSP Builder system to design a digital system is introduced. After analysis of the implementation methods of Chaotic sequence generator with hardware, design a Chaotic sequence generator with this tool.The whole system is simulated and tested, and the result indicates that the flow of the hardware realization is predigested greatly. Moreover, this method inaugurates a new way of designing DSP processor and its system, and it does a meaningful attempt in designing DSP chip with individual property right.At last, we draw out the conclusion of this paper and point out the further research issues.