| With the rapid development of integrated circuit technology, single-chip image processing has become one of the current research focus. The FPGA that has become widely used in research and design combines microelectronic technology, circuit technology and the EDA technology, so that the designers can concentrate on the logic function design, shorten the design cycle and improve the design quality. The work of the paper is to research and achieve the single-chip of real-time edge detection based on Altera's CycloneII series FPGA chips.The whole process of the research and design is completed in the environment QuartusII and DE1 and so on. Thesis is the focus of the system architecture and design of the simulation module, in which a detailed analysis of the ping-pong operation of the system in ways, implement the camera driven, video data stream format, FIFO's read and write operations, data processing brightness, edge data processing and so on.Different from the traditional processing that use the software and the general-purpose processor, the design is based on the hardware to achieve, including the calculation of the brightness and the edge data so that we can saves a great resource overhead. In order to meet the system requirements for real-time, the system is working on the ping-pong operation mode and the processors have multi-pipeline.Theoretical analysis and the results show that the system architecture is very suitable for real-time image data processing, including read and write dual-port ram approach of ping-pong operation mode as well as the multi-pipeline processor can be a general methods of a follow-up real-time image processing system. |