Font Size: a A A

The Research And Design Of 1024 Floating-Point FFT Processor

Posted on:2010-11-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y SunFull Text:PDF
GTID:2178360302459574Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
FFT processor has a wide range of applications in speech recognition, image processing and spectrum analysis, and in the OFDM system we use the real-time FFT processor to achieve the sub carrier modulation and demodulation, another way the OFDM system also has the high request of FFT processor with the general rate between 6Mps to 155Mps. With the level of IC manufacturers continue to progress, independent research and development of high-performance FFT processor is possible, according to project requirements we study the FFT method, choose the structures of hardware and design under the premise of ASIC design methodology, also able to meet the SOC system-on-chip design requirements.In this article we use the top-down design methodology to design the 1024-point floating-point FFT processor. First we complete the description in RTL-level design and the testbench of each module for timing analysis; second base on DC we complete the ASIC synthesis and timing constraints; third the mainly job is the completion of top-level functional verification and random test, the results is compared with the simulation module built by C language and constrast further validation in matlab; Finally the FFT processor applied in OFDM systems.The main points of innovation in design and verification are: the application of CSA to speed up floating point adder and multiplication operations; the design of radix module with combinational logic is a long cycle path, occupied by three the calculation of clock cycle time; for saving the storage space table size of ROM in different levels is different, RAM design using dual-port RAM, you can read and write at the same time to increase the speed; an intermediate level of each state machine plus dual counter to read and write operations to control and enable the generation of address; set up a testbench for the middle-level testbench assembly line can be reused, the preparation of a structured test module testbench to achieve reusability; based on the C language platform for the preparation of FFT simulation module, and RTL-level top-level module to compare the output value and the ultimate use of matlab output waveform.In conclusion, we verify the completion of FPGA-based FFT processor research and implementation. Floating-point FFT processor compared to other FFT processors has many merits, the scope of input and output data have been greatly expand, and 10 pipeline levels satisfy the conversion requirements of real-time, 1024 points FFT accuracy meet the communication system in which high-performance requirements.
Keywords/Search Tags:FFT Processor, Radix module, Testbench, FPGA
PDF Full Text Request
Related items