Research On Jitter And Ringing For Signal Integrity In Analog IC

With the increase of working speed, the research on Signal Integrity is very important in IC design. In order to solve this key problem, the impacts of IR drop, IR delay, electro-migration, antenna effects, coupling crosstalk, and substrate noise on signal integrity are discussed in this thesis. At the same time, the related simulation and test methods are also introduced.The jitter and ringing effects are first studied. As one of important factors which cause jitter, inter-symbol interference is discussed, and then current mode logic with pre-emphasis circuit is developed. Meanwhile, the equalizer including capacitor array is designed, and its significance is verified on ISI by creating simulations with cable models on different length.The reasons for ringing are analyzed in detail. On the basis of the analysis, effects of parasitic parameters on the ringing of CML are studied. The solution to decrease the ringing of LVDS is obtained based on analyzing the internal signals. .Because the mentioned solution has higher power consumption, a new and simple method, which keeps the effects in the acceptable range, is given by using the impedance matching technology.