Research On High Performance Data Exchange Interface Based On Multi-core SoC

With the development of communication technology, network processor has been one of the core equipments of modern network system because of its high performance and flexibility. Network processor is a data forwarding device, so the performance of the data exchange interface has much effect on its line-speed forwarding ability. The bandwidth of data exchange interface is the basic bandwidth of network system. Optimizing the structure and function of the interface unit can effectively reduce the network processor processing units in the workload and improve overall performance.Key technologies of data exchange interface are analyzed and researched in this paper, and a design plan of the interface unit faced to multi-core SoC is given. An on-chip data buffer storage structure and a synchronizing mechanism in multi-clock domains is used for exchanging data between network processor and MAC device. Port ready polling and active request mechanism is used for different rates of MAC devices. Upon completion of the basic functions of the above, a series of methods are given for optimizing design:pipeline structure based on command control for improving the accessing efficiency of multi-core system; A circuit can help the processing unit to assign thread and maintain the packets; There is also a DMA channel connecting to memory unit to save processor resource.Structure design, RTL modeling and functional verification of the data exchange interface is accomplished. The interface unit can support 10/100/1000Mbps MAC ports, it can give a 3.01 Gbps bandwidth in the frequency of 100MHz. Multi-core structure is well supported.