Research And Implementation Of A Verification Platform For Multi-core Processor Prototype

The traditional way to improve processor performance is increasing frequency via superscalar and pipeline, the motivation is to exploit fine-grained parallelism in instruction level. Now frequency of one single processor has come to a maximum value which can be improved hardly because energy and power are two restrictions to boost chip performance increasingly by this way. On the other hand, as development of integrated circuit, more and more transistors can be integrated into one single chip, and more on-chip transistor resource is available for architecture designer. To solve the problem of power and energy partly, researcher and designer have presented chip multiprocessor (CMP) as new processor architecture, and the motivation is to improve chip performance via coast-grained parallelism in thread level.For available on-chip transistor is increasing as Moore's Law, chip design is becoming more and more complex, corresponding to it, emulate and verification of one chip prototype are very time consuming and fairly important, especially when using traditional software simulation. So many researchers have exploited FPGA to design prototype, and one of merits of the emulation and verification platform based on FPGA is it can run close to real processor chip, including speed and accuracy. We have been researching and designed the emulation and verification platform based on FPGA of multi-core processor prototype in the context of Godson-T, one chip many-core processor which is designed by Institute of Computing Technology, Chinese Academy of Sciences. In this thesis, we illustrate the principle, theory and difficulties that should be considered seriously during designing this platform, and the content mainly including following aspects:1. We designed and implemented a simple program loader aims at Godson-T, and its function is to download Runtime and executable files compiled by cross-compiler into FPGA platform which illustrated in this thesis.2. We implemented a driver of the prototype verification board based on PCI interface. And its function is an interface between software and hardware platform like a bridge.3. We designed the hardware I/O interface aims at Godson-T, which bridges PCI controllers and Godson-T hardware, that is, translating signal coming from host OS into packets that can be recognized by Godson-T. 4. We implemented the prototype of Godson-T verification platform, and verified Godson-T from module level to system level based on it, and now we can run some parallel applications on this prototype.It is very complex to emulate and verify a processor, and the prototype designed in this thesis is the basis to emulate and verify many-core platform, such as Godson-T. Now the verification platform has been able to run some small scale parallel application, and we have a lot of works to do for the purpose of verifing functions of Godson-T.