| With the development of the information technology, image collecting and processing technology is used more and more popular in our lives. As most traditionary systems of image collecting and processing depends on computers, the further application of image collecting and processing technology is obstructed.Now the new systems of image collecting and processing based on FPGA and DSP, which have the advantage of smaller volume, lower power dissipation, easy to carry and building block design, are becoming the popular research subject.The scheme is given in this thesis for the design of image collecting and processing system base on FPGA and DSP. This system uses Niosâ…¡based on FPGA as the coprocessor to collect image and DSP as the master controller to process image.The image data is transmitted by the application of data buffer which is consisted of FIFO component.Firstly, this thesis introduces the entirety design of the system, including hardware and software; Secondly, not only the method about building the SOPC system on FPGA base on Niosâ…¡processor, but also the design way of the controller for some peripheral devices is given. Thirdly, it illustrates the design method of DSP in hardware and software. Finally, it clarifies the issues about designing the OSD including hardware and software.The system of image collecting and processing, which designed in this thesis, takes full advantage of FPGA and DSP. It is portable and universal because of its flexible structure.And this thesis offers some valuable references for the design of image collecting and processing system based on FPGA and DSP. |