Multi-Core DSP Design Of TD-LTE Femto-Cell Downlink Transmitter Processing

Integrating MIMO and OFDM air interface technology, LTE (long time evolution of UMTS) is one of the latest steps in the advanced series of mobile telecommunication system. Its performance on broadband wireless access capability attracts the industry, but also takes challenge to the computing capability of its network equipments.Femtocell is a kind of device designed for 3G and beyound-3G mobile system, to enhance its macro-cell indoor coverage as well as the performance of wireless broadband data network services. As a supplementary access device in the communication system, the commercial prospect of Femtocell is determined by the cost of the product.The key feature of Femtocell designed for TD-LTE system is to optimize the original encoding algorithm and simplify the processing by parallel design, in order to reduce the cost. PicoArray multi-core DSP processor with its powerful parallel processing capabilities and flexible design concepts is an ideal hardware platform for TD-LTE Femtocell.This paper describes the TD-LTE Femtocell design and implementation on multi-core DSP processor, and the effort on system optimization to meet the needs of real-time communication system.To improve the system's parallelism and reduce the computational complexity is the core of this paper. We begin the work by optimizing the processing described LTE protocols and enhancing the efficiency of multi-core parallel processing system. This paper also analyzes the different types of processors on the DSP platform, and adapts them to the specific storage and computing demands of various sub-modules.