Improving ISCSI Memory Cache Hit Through Prefetching To A Striped Disk

Given the imbalanced advancement in size of memory against access speed, storage systems are faced with disk access time increase as disk size increases. Prefetching is one of the mechanisms known to lessen the gap created by increasing storage memory size. Through prefetching, memory accesses are performed in parallel with CPU cycles thereby hiding memory latency in order to have data required for the next cycles in places where the processor has faster access. Having data closer to the CPU in time saves lots of CPU cycles that would otherwise be wasted waiting for I/O requests. This paper proposes an iSCSI operating system scheduler-assisted prefetching mechanism based at the iSCSI initiator, whose aim is to prefetch and cache pages from the iSCSI target to the iSCSI initiator striped disk. The prefetcher with the aid of system calls made to the iSCSI driver in form of read, write and seek is able to track file descriptors and inode information later deriving actual request data blocks. Given information on requested blocks, the prefetcher is able to make future access predictions and with the help of prefetch analyzer deduce which process requests are sequential. The prefetch analyzer further compares process schedule information analyzing possibilities of a good fetch. By caching pages on the iSCSI initiator striped disk, the bandwidth is used efficiently and yet high access speed is attained. The disk being striped facilitates faster access due parallel access to the data spread across different partitions. Fetching remote pages to an iSCSI initiator striped disk, the prefetcher is able to have enough pages on the local initiator machine which saves bandwidth. Because of this, most of the initiator page requests are serviced locally. The algorithm shows at least 15% increase in sequential reads and up to 10% increase in random reads. Also, observed is a remarkable decrease in the application run time.