Design Of SoC Verification Platform

As the VLSI coming into SoC period, simulation and verification become more and more important. With the design complexity and market pressures, the design of platform also has higher and higher requirements. Therefore, software and hardware co-simulation method would be used in designing multimedia chip.The main work of the thesis is to design a SoC verification platform.In the thesis, the concept of multimedia is introduced firstly,then multimedia technology and the meaning of verification system is introduced.And then the FPGA verification technology and digital multimedia chip simulation technology are introduced. Finally, a SoC verification system is designed and is used in the verification of multimedia chips. In this system, FPGA,ARM and DSP will be integrated into one system. The system is divided into two main parts: motherboard and daughter boards. The motherboard includes two FPGAs and 160 general I/O, which are used for connections. The daughter boards include FPGA daughter board, ARM daughter board and DSP daughter board. For the input and output of audio and video signals, external expanding sub-boards are used. This thesis mainly discusses the design of the motherboard. Firstly, the hardware of the system including circuit schematic diagram and PCB diagram is completed. Here, various modules of the circuit schematic diagram are discussed in detail. And the problems which need to be paid attention to in PCB design, such as signal integrity, are introduced too. Secondly, the interface controllers and memory controllers belonging to the motherboard of the system are designed, such as UART, SRAM controller, and FLASH controller.Finally,the deblock filter IP and Gamma filter IP are implemented in this system.