Research On Multi CCD Synchronous Image Acquisition System

This article is based on our large-scale national marine program "DigitalOcean", the development of the simulation test of image acquisitionsynchronization section in digital sea acquisition and generation systems. Thispart is through the real-time record of the sea surface geometry waveform change,dealing the acquisition image with algorithm, transforming the real-time seawaveform image for the3D height map with corresponding geometric accuracy,and obtaining the digital waveform of sea surface simulation.Because of the large pool area of the wave under test, the measurementrange of one CCD camera can not cover the whole measurement area, and can notmeet the needs of measurement. Therefore, we need adopt the way of multi CCDcamera subregion measurement and data fusion to do a wide range of wave heighton line measurement, which uses multi CCD camera from the different spaceposition to measure the whole region. By spaced along the wave pool anddecorated with four stations, each station is responsible for the wave heightreal-time data acquisition and measurement work of covered wave area. As thefour stations measurement is the same laser reference plane modulation on thesame waveform, just different measurement area, and the four groups of waveheight measurement information can be normalizing and data fusion processing.In order to realize the image acquisition of wave pool area with multi CCDcamera, multi CCD synchronization image acquisition system is designed in thispaper. In this system, the CCD camera of camera Link interface acts as imageacquisition device. Field Programmable Gate Array (FPGA) acts as the controlcore, and realized the image acquisition and display of wave pool image. Systemtransforms CCD acquisition image data into the FPGA data caching modulethrough the Camera Link interface, and then the data caching module transformsthe collected data into the computer through the PCI interface, finishing the whole image acquisition.Hardware design of the system includes features chip selection, FPGA andCCD camera interface design, multi CCD camera synchronization control circuitdesign, image acquisition and pre-processing module design, FPGA and PCI businterface design, and power modules design. In programming, using verilog HDLhardware description language for the design of multi CCD camera synchronizedtrigger logic, Camera Link interface logic, SDRAM image buffer control logic,and PCI interface logic and other logical unit. Finally, the schematic and PCBboard design is completed.Through the system simulation and test, it shows that the system meets thedesign function, basically completed the design requirements.