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Development Of Digital Gps Receiver Based On Pci Bus

Posted on:2010-10-26Degree:MasterType:Thesis
Country:ChinaCandidate:Y G ZhanFull Text:PDF
GTID:2190330338978731Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Global Position System (GPS) is a new generator of precious positioning and navigation system based on satellite. It has the characters of global coverage, all-weather, high- accuracy, continuous and real-time three-dimensional positioning and navigation services, and so on. Which has been widely used in military and civilian field, such as, air and sea navigation,mapping and communication.First, this paper introduces features and principle of GPS system, and gives a detailed account of design principles of GPS receiver. A typical digital GPS receiver consists of signal reception, A/D conversion, correlation processing channel, navigation and application processing, user I/O and power, and so on. According to design requirements, we determine the design program of typical digital GPS receiver based on PCI bus. In the process of circuit design, we select popular GPS series chips, PCI bus interface chip and matching chip in the market, and achieve every function of the receiver.In the process of Receiver radio front-end circuit design, we used the Zarlink Co. GP2010 C/A code down-converter and matching radio filter, TCXO, peripheral filter circuit. GP2010 is super-heterodyne triple down-converter, achieves signal reception, down-conversion, and A/D conversion. The module of base-band signal processing consists of GP2021 C/A code channel base-band correlator and peripheral circuit, which accomplish GPS signal acquisition, tracking, despreading and demodulation.This paper describes the features of PCI bus. The PCI interface circuit consists of PLX Co. dedicated interface chip PCI9052 and corresponding peripheral circuit, it uses the setting of PCI9052 configuration register and combination logic circuits to achieve the sequential logic conversion of interface and the transmission of PCI bus. It also develops the PCI device driver to achieve the read/write operation of GP2021 internal register, initialization of receiver and reception of navigation message, the development of receiver platform. And it gives a detailed account of actual design and debug scheme of GPS receiver.
Keywords/Search Tags:GPS receiver, GP2010, GP2021, PCI Bus, PCI9052, Device Driver
PDF Full Text Request
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