Sinwfet Assembly Method And The I-v Characteristics

Silicon nanowires field effect transistor (SiNWFET) is considered to be the next-generation semiconductor devices. And it has become the research issue in nanoelectronics fields. With the microelectronic technology and the integrated level of devices improving, the traditional device preparation method has reached the limitation of Moore's law prediction. The traditional devices preparation methods of "top to bottom" are encountering the challenges not only in practice but also in theory. Great efforts have been made in the new strategy to design novel devices and circuits.In this thesis, the main works focus on the assembling methods andⅠ-Ⅴcharacteristics of the silicon nanowire field effect transistor. Firstly, because the temperature during the nanowire growth makes a great influence in electronic performance of nanowire, a model related to gold nanoparticle and melting temperature for VLS grown silicon nanowire, based on the Lindemann's melting model, is proposed. Eutectic temperatures of Au-Si with different gold size have been calculated using the model and are agreement with the experimental results. The model has been demonstrated to be reasonable, and it can be used to define the growth temperature for VLS grown silicon nanowire. Secondly, based on non-equilibrium Green's function (NEGF) method, a simulation model has been built.Ⅰ-Ⅴcharacteristic of silicon nanowire field effect transistors in different scales have been simulated using the model, and the simulation results agree with the experimental results. Meanwhile, because the doping concentration is not uniform in radial direction, a simulation model of non-uniform doping has been proposed by correcting the former model, and the results of the simulation are agreement with the experimental results. Thirdly, based on the simulation results, the Spice model parameters have been extracted using the software BSIMPro, and the Spice simulation models have been built. And, the simulations in inverter and half adder have been done by using the Spice models. The results of the simulations show that the model we built are very useful in the basic circuit simulations. Finally, because the electronic performances of silicon nonawire transistor are influenced by several factors, a new assembling method has been proposed, which is improved and optimized in the nanowire growth, the treatment before assembling, and the assembling method. And this method is compatible with the microelectronic preparation process.