With Fully Integrated Dc-dc Converter To Improve Efficiency At Light Loads

With the development of the integrated circuit technology, minimization of the electronic devices is becoming more and more popular. The high density system solutions are drawing more attention. The minimization of the power IC is obstatcled by the large scale of the off-chip components. At the same time, the fully-integrated power IC is more attractive, due to the advantage of eliminating the external passive components. However, the switching frequency should be increased to 100MHz range so as to integrate the passive components. As a result, the efficiency drops dramatically at light loads for the large switching losses. This problem is even severer when it enters sleep mode. The well-known Pulse frequency modulation (PFM), which is used to improve the light-load efficiency, however, leads to large output voltage ripples and noises in unpredictable spectrum. There is still a great need to further exploit good solution to improve the efficiency of DC-DC converter at light loads.According to the problems metioned above, this paper presents a hybrid mode control method. The system can operate in a switching mode or in low-dropout regulator (LDO) mode according to the load condition, which is an effective solution to the efficiency problem.This paper firstly introduces the principles of DC-DC converter and LDO, compares their characterstics and merits respectively, and gives out sytem structure and key specifications. The LDO shares a 7nF output capacitor with the DC-DC conterter. It is analyzed in details and designed to achieve good stability under various loads between 0-50mA. Further more, the lossless mode selection circuit is proposed, and successfully achieves the automatic mode transition between DC-DC converter and LDO. Finally, the passive components are fully integrated on chip according to the requirements of the system.The power supplier in this paper can produce a 0.9V output from 1.2V input with a switching frequency of 250MHz. The chip was implemented in a 0.13μm standard CMOS technology. The measured peak efficiency reaches 80% at 90mA load, and the efficiency keeps as 70% at 10mA load. The hybrid mode control method reduces the power consumption in sleep mode from 10mW to only 0.84m W...