Time Domain Pulse Sampling Head Design

It is known that the oscilloscope is the best tool to measure waveform of electric signals. At present, the bandwidth of oscilloscopes have exceeded 100GHz, which is wide enough for measuring the nanosecond signals. But the oscilloscope is not suitable for getting the realtime waveform of fast signal and its related data processing. The Digitalization of analog signal should be done before data processing, and analog to digital converter(ADC) is designed for this purpose. Now the conversion speed of a 10-bit ADC has exceeded 2GSPS, enough for the sampling of impusle signal which is only several nanoseconds long. However, the fastest ADCs are unable to complete the real-time sampling of signal which is shorter than one nanosecond.Time domain impusle radars send sub-nanosecond impusles via array antenna, and get the information of target after the data processing. Obviously, both the oscilloscopes and ADCs are not suitable for doing that, becsuse of the expensive cost of oscilloscopes and the bottleneck of conversion speed of ADCs. Since the echo signal is generated periodically, time domain impusle radar can sample the waveform by sequential sampling.Generally,it is the only way to get a sampling head that buying a sampling oscilloscope, since the sampling head is a part of the sampling oscilloscope. Working as a receiving front-end, the sampling head designed in this dissertation is a key part of the time domain impusle radar system. For these reasons, it is very significant to design the sampling head for this radar.The physical procedure of sampling is studied in this dissertation. The sampling head is designed to sampling waveform of time domain pusle which has a wide frequency spectrum. The frequency characteristic of sampling head is studied to improve the bandwidth. Sampling efficiency of sampling gate is also studied, because it is very important for the sampling head. The detecting range of time domain impusle radars largely depends upon the sensitivity of radar system, which is determined by the noise level of sampling head. Blow-by of the sampling gate is considered. The principle of this phenomena and how to reduce its impact are studied. This dissertation includes the detail of circuits design, such as strobe pulse circuit, high speed sampling gate and buffer amplifier. The goal of this dissertation is to design a sampling head which is adequacy for the sequential sampling used in time domain impusle radar. Finally, the original sampling head S-1 can be successfully replaced by the new one designed in this dissertation. The sampling head, has acheived the performance with 2.3GHz sampling bandwidth,±8V input range, and 2mVrms noise. Now, it is used on a Ground Penetrating Radar(GPR) system, a kind of time domain impusle radar. Development of this sampling head, has enhanced the capabilities of independence research and development of time domain impusle radar.