Font Size: a A A

Based At84as003 High-speed Data Acquisition System Developed

Posted on:2012-04-19Degree:MasterType:Thesis
Country:ChinaCandidate:G T ShenFull Text:PDF
GTID:2208330332986650Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the development of electronic industry, data acquisition system is used more and more widely, which results in higher requirements of technical indexes of acquisition system:high sampling speed, high resolution, high precision, large analog input bandwidth and big storage capacity. At the same time, the system circuit architecture, PCB and device selection also have higher requirement.This article describes a high-speed data acquisition system, of which the resolution and the highest sampling rate are 10 bit and 1 Gsps respectively. After researching and analyzing through literature review, the ADC+FPGA+DSP system architecture is ultimately determined. High-speed ADC part uses a monolithic single chip AT84AS003 of E2V, and the storage and processing part uses FPGA+DSP architecture, which combines full advantage of flexible logic configuration, high-speed of FPGA and the advantages of data processing of DSP. The structure is flexible, versatile, and suitable for modular design, which can be used for real-time processing of acquisitioned data.FPGA is the data storage part of this system, and bridge of ADC and DSP, Xilinx Virtex-â…¡Pro Series device XC2VP20 is selected as FPGA part. In order to prevent FPGA from being the bottleneck of the entire acquisition system, a detailed and thorough research and design is important. FPGA is designed using VHDL for hierarchical design, and the functionality of FPGA internal circuit are verified through functional simulation. DSP part is the data processing part of this system and assists FPGA with the acquisition data recovery, which uses TI low-power fixed-point digital signal processor TMS320VC5509A.First of all, the system architecture is made, and the hardware circuit diagram and PCB are designed secondly, and then some code of FPGA and DSP is completed. The final hardware and software debugging of the system performed well and the desired result is achieved.
Keywords/Search Tags:high speed data acquisition, AT84AS003, FPGA, DSP, demultiplexier
PDF Full Text Request
Related items