Research On Hexagonal FPGA Interconnection Structure And Anti - Radiation Routing Algorithm

FPGA is widely used in digital circuit systems for its programmability, which reduces the risk, achieves good flexibility, as well as shortens the time to market. But FPGA also pays the price, with more area occupation and circuit delay compared with Application Specified Integrated Circuit. Further investigation shows that the pro-grammable routing resource makes up most of the total FPGA area, and the routing segments and switches are the main source of the circuit’s delay. With the feature size of the chip getting smaller, routing resource’s influence on area and delay is more critical. Also, the lower operating voltage and greatly increased logic capacity make FPGA more sensitive to Single Event Upset. This paper focuses on the improvement of FPGA routing architecture and FPGA routing algorithms to achieve better per-formance.Traditional FPGA routing resource provides horizontal and vertical channels, but most of the connections in the circuit are oblique, while only horizontal and vertical segments can be used, which makes the routing resource less efficient and lower the circuit’s speed. This paper proposes a hexagonal-based FPGA architecture, called Honeycomb FPGA (HC-FPGA), which contains routing channels of three directions to meet the multi-directional connection demands. Experimental results show that HC-FPGA can achieve about11.9%better performance than island-style FPGA in terms of Average Area-Delay Product of the20largest MCNC circuits.With higher density and lower operating voltage, SRAM-based FPGAs are more sensitive to SEU, especially when FPGAs work in aerospace environment. This paper presents an anti-SEU algorithm, and conducts experiments on FPGA chip with fault injection platform. Experimental results show that this algorithm can improve FPGA’s SEU tolerance performance by20%, without introducing extra hardware resource or additional design redundancy.