Design Of Channel Emulator For Broadband Low Voltage Power Line Communication

With the developments in technology, information and communication technologies are becoming more widespread and one of the basic building blocks of humans life. While the demand in communication increases, power line communication (PLC) has become a hotspot as one of the potential candidates for next generation communication technology. Power line communication could be classified into narrowband or broadband:narrowband PLC supplies service of low data rates, and suits applications of automation and control; broadband PLC system support data rates higher than2Mbits/s and telecom services including internet access. By voltage PLC networks are classified into high-voltage, middle-voltage or low-voltage network. Low-voltage networks transfer electric power to consumer with voltage level of several hundred volts. Due to its widely existence and low cost, low-voltage broadband PLC is considered to be an economic solution for "the last mile" problem and attracts more and more attention.Not constructed for data communication, power lines have the disadvantage of adverse channel condition. To overcome the effect of bad channel condition, study the relationship between communication configuration and communication performance and optimize PLC quality, modeling and simulation of PLC channel become a key problem. There are strong attenuation for transferring signal, notable multipath effect and different kinds of noise in power line channels. Standards of power lines differ in different countries and regions, and as a result there are many ways of modeling for PLC at present. However, there are only a few practical and flexible PLC simulators as well as PLC hardware simulator, and some aspects of them remain to be studied and improved. On the basis of low-voltage broadband PLC, with analysis of existing modeling and simulators, implementation of channel and noise models are discussed, and a flexible, easy configurable, practical and circuit area efficient channel simulator is presented, implemented and verified on FPGA.