| As used in environment of high voltage, we ordinarily used high-voltage delay timer to delay time, which utilized the method of LC oscillation. Though the high-voltage delay timer is high reliable and simple, it is difficulty to improve the precision and adjust time and decrease volume..This paper present a novelty circuit, high precision and small volume, whcih was called as low-voltage delay timer, and consisted of three modules, digital delay timer and its interface circuits.In this paper, we first introduce the theory of low-voltage delay timer, also recommend the select and design of the key components, VMOSFET and pulse transformer in the interface circuit. Lastly, we analyze and simulate the effects of three modules to delay time precisions.In this paper, the optimization method was used to design the interface circuit, and use VHDL description to design low voltage digital delay timer.The experiment results of prototype device prove that the low voltage delay timer is operating. |