To Achieve Low Bit Rate Video Coding Based On The Dsp Processing Platform

This thesis describes how to realize H.263 video encode recommendation on TMS320VC5471 hardware platform. With its limited resources, we only realize the INTRA for I-picture. But, furthermore, we also realize the INTER Mode for P-picture in the CCS simulator. The software is transplantable and prepared for the further high performance DSP system. We can look upon the study as a new product coming into the mature, which encode video source with matured DSP technology; also, we can look it upon just as a new experiment, setting up software system on digital signal processor.