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Single-frequency Research And Development Of The Network Adapter

Posted on:2007-12-12Degree:MasterType:Thesis
Country:ChinaCandidate:B B FengFull Text:PDF
GTID:2208360182490559Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The Single Frequency Network (SFN) implementation of Digital TV Broadcasting-Terrestrial is not only the focus of the world, but also the one China try her best to develop. Consequently, we should do the research on this field and develop the products with the independent knowledge property right, as there are both economical interest in the short term and social benefit in the long term. The SFN adapter studied here is one of the key equipments of the SFN.Firstly, we analyzed the structure of SFN and the principle of the synchronization. The adapter inserts Mega-frame Initialization Packet (MIP) into the transport stream, and in this way the transmitter can get the time information and be synchronized. MPEG-2 and DVB-T are the two basic technologies.Secondly, the integral scheme of SFN adapter's implementation is proposed. By analyzing the function need and current development condition, we proposed the performance criterion and selected FPGA as the core flatform of the scheme, we accomplished the hardware flatform design, main devices selection and the circuit schematic diagram design.Thirdly, the implementation of the software based on FPGA is discussed in detail and the simulation results are given in this paper. Top-down system is used in the software development. Firstly, we divided it into several modules: input and output control module, MIP insertion module, PCR updating module, et al. Then, we introduced the implementation principles of the main modules in detail. Verilog language is used here and the simulation results based on QuartusII are given. With the analysis of the integral simulation results, it is easy to find that the basic function of the SFN adapter is implemented successfully.During the implementation, we proposed a novel algorithm for updating PCR. By replacing adder by counter, it reduced the occupation of system resource without any influence on the results.
Keywords/Search Tags:SFN, SFN adapter, MIP, synchronization, FPGA
PDF Full Text Request
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