Arc600-based H.264 Decoder

With the development of information technology in 21st century, there grows the need of storing and transmitting video information efficiently.Multimedia services are widely used in these applications, such as HDTV setbox, mobile cell phone, PDA and etc.As the most efficient presentation method among various digital media signals, development and research on these devices has become a hotspot in signal processing fields.H.264 standard greatly improves coding efficiency and becomes the research focus nowadays. The great complexity of video signals makes it difficult to implement multimedia application based on H.264 for handheld devices due to limited hardware resources and rigorous constraints for power and cost. Generally , the implement always depends on ASIC or other dedicated equipments,but comparing with that relies on software it costs more highly and is less flexible and long term to develop ,especially it has no expansibility .With the development of General processor and the improvement of features of DSP, Implement of more flexible ASIC design with configurable CPUs becomes popular. This thesis describes the implementation of H.264 decoder and part of encoder on two configurable ARC600 CPUs.In this thesis, the complexity of JM9.3 H.264 decoder is analyzed first. Optimization methods in IP(Inverse prediction,intra-prediction and inter-prediction) , DEBLOCK , other parts of decoder and IP part of encoder are proposed based on general processors. And then according to the features of configurable processors ARCompact Series, the results of platform simulation and the design of software-hardware development are discussed. Then, discussions about designing software on ARC600 are provided together with the introductions of the ARCompact ISA and architecture of ARC600. The implementation based on platform ARC600 includes the code transfering from X86 to Metaware IDE , the optimization on ARC600 and the configuration of parameters. At last, Simulation results and discussions are presented and discussed. Some suggestions about how to improve decoding performance are also listed.The ultimate goal of this paper is to implement the real-time, high-performance and low-cost H.264 decoder based on two configurable ARC600 CPUs.