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.8-bit Mcu Ip Core Functional Simulation And Fpga Verification

Posted on:2007-10-09Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhangFull Text:PDF
GTID:2208360185982376Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the rapid development of submicron fabrication process and design technology, the integration degree of Integrated Circuit advances to a higher altitude, the more complication of chips requires more efficient verification methodology.SDU_M08 is an 8-bit RISC Microcontroller Unit IP core. It is compatible with the instruction set of PIC16C57 of Microchip Corporation. This paper describes how to implement functional verification for SDUM08.There are two important elements in functional verification: setting up verification platform and coverage metrics. Setting up verification platform can settle two problems: verification scheme and generation of stimulus. Coverage metrics is used in the verification environment to measure the thoroughness of the verification process. Using the bottom-up approach, SDUM08 functional verification is divided into two levels: block level and system level. Verification platform is set up using Vera. The platform can get function coverage metrics automatically.FPGA prototype for SDUM08 is also implemented in order to verify the core at a hign speed like that in the actual target environmentVia functional verification of SDU_M08, this paper studied the method for setting up verification platform and the application of automated verification in functional verification.All of the work contributes a lot to the reliability and efficiency of the functional verification.
Keywords/Search Tags:RISC, functional verification, functional coverage, VERA, FPGA
PDF Full Text Request
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