Developed Based On The Bcd Process Of 10w Digital Audio Stage H-bridge Power Amplifier Chip

With the widely use of CD, MP3, DVD, cell phone and HDTV, digital audio power amplifier (DAPA) prevails in audio amplifier field for its high efficiency, low distortion, low cost and portability. Digital amplifier power stage(DAPS)which directly relates to these advantages plays an important role in the whole DAPA system.Based on analysis and experiments of mainstream DAPA and DAPS, a 10W H-bridge power amplifier circuit is designed with TSMC 0.35μmBCD technology. Amplifying PWM (Pulse Width Modulation) signal, the chip is compatible with 4Ω, 6Ω, 8Ωspeaker loads. It can provide the maximum RMS (Root Meaning Square) power of 10W (with 4Ωload) and the maximum efficiency of 93% (with 8Ωload) with over-current and over-temperature protections. A simple and practical over-current protection circuit with self-hold is designed, which saves chip size by replacing the voltage reference that normally used in the traditional over-current circuit with a current reference.The main contents of this paper are as follows.(1)The structure of the DAPA system is illustrated, as well as the generation mechanism and control mode of the PWM signal, two kinds of DAPS, the LPF and the model of the speaker.(2)Using the digital audio processor chip designed in VLSI, an experiment of full bridge power amplifier and two experiments of H_bridge power amplifier are done. Necessary analysis on results is carried out for the integration of the processor and the amplifier in DAPA, meanwhile some modifications of the digital audio processor have been done.(3)Based on systematic analysis and experiments, specifications for this circuit are assigned. According to these requirements, the architecture of H_bridge power amplifier and its sub-blocks are designed. Sub-blocks comprise H-bridge amplifier, DMOS driver, bootstrap circuit, level shifting circuit,dead time generator , PTAT (Proportional To Absolute Temperature) current reference with UVLO,over-current protection circuit and over-temperature protection circuit. (4)Using the library provided by TSMC, simulations of all the sub-circuits and the whole circuit are done by either Cadence Spectre or Synopsys Hspice. The results are calculated and analyzed. A conclusion is drawn, which shows that the whole circuit fulfills all the performance requirements defined by system.(5)Layout of the circuit is designed with Virtuoso (Cadence), and then DRC, ERC & LVS are validated with Calibre (Mentor).(6)The testing plan is programmed for the chip test after taping out.